1. Field of the Invention
This invention relates to a semiconductor memory device.
2. Description of the Prior Art
A typical semiconductor memory device has an array of memory cells grouped into plural words each having a given fixed number of bits (a given fixed length). In the semiconductor memory device, data is written and read into and from the memory cell array word by word. Such a semiconductor memory device can not meet a requirement for changing a word length.
Japanese published unexamined patent application 61-992 discloses a semiconductor memory device which includes two memory cell arrays each having a word length of 4 bits. The two memory cell arrays are combined into a composite memory having an effective word length changeable between 4 bits and 8 bits.
Japanese published unexamined patent application 2-168496 discloses a semiconductor memory device in which an effective word length is changeable among 1 bit, 4 bits, 8 bits, and 16 bits.